The Problem
A few years ago, my co-founder Lenny and I taped out custom silicon at TSMC. It was a complicated mixed-signal ASIC, and — against all statistical odds — it powered up flawlessly on day one. The printed-circuit board that hosted that miracle chip? Two unconnected nets, one flipped footprint, and a thermal relief that never relieved. That disconnect still blows my mind. Modern semiconductor toolchains can verify billions of transistors, yet the software that routes copper on a postcard-sized fiberglass slab can’t protect engineers from simple blunders. We realized the bottleneck in hardware innovation wasn’t Moore’s Law; it was the “one-board-per-quarter” cadence forced by legacy EDA workflows. So we started Diode to close that gap.The Broken Workflow
- Siloed design in heavyweight, decades-old EDA suites.
- Manual export of a dozen file formats, each with hidden assumptions.
- Email ping-pong with fabricators over spacing, drill tables, and stack-ups.
- Spin, wait, repeat—all while the BOM mutates in the background.
Our Solution
Traditionally, Electronic Design Automation (EDA) has faced several limitations. Our goal is to redesign the entire stack to make it better for humans AND machines:- Open Source, Pythonic Code: Unlike proprietary, closed schemas, Diode’s open and human-readable code is easily understood by LLMs for generation and readily reviewable by humans.
- Lightning-Fast Verification: Our Rust core compiles full designs in milliseconds, drastically speeding up the verification process.
- Designed for manufacturing: We move beyond “one-size-fits-nobody” rulesets by incorporating shop-specific, machine-readable constraints from the outset, ensuring tailor-made and efficient design adherence.
What We Offer Today
- A board design every 4 days A single EE at diode shipped 100+ unique designs last year without too much effort (it was still hard).
- Fortune 100 & frontier startups Teams at Physical Intelligence, Saronic, and several Tier-1s are already using Diode to shrink revision counts from five to one.
- Format-agnostic output If your workflow is Altium or Cadence today, you’ll still get BRDs, ODB++, or IPC-2581 - just without the pain.